With the semiconductor process moving towards the point below 3 nm, advanced process micro-condensation technology has gradually approached the physical limit. Recently, Intel's high-level and rare publicly pointed out that the chip manufacturing process will no longer be reversing "photocopy technology" in the future, but will be led by fundamental changes in the transistor architecture. This has also added hilariousness to the widespread adoption of ASML's new generation of High-NA EUV.
According to a high-level interview content shared by Tegus on X, the Intel Director emphasized that with the mature trend of the new generation of transistor architectures such as GAAFET (circular gate) and CFET (internal FET), the key control points of wafer processing will shift from the extremely limited resolution mask process to the precise etching and material deposition technology, further reducing the new generation of High-NA EUV (advanced lithographic) The dependence of equipment).
Director at Intel explains why ASML has been struggling due to GAA, and will struggle with the move to CFETs as well (via Tegus). The bright spot in terms of order flow can be high-NA adoption later this decade, or EUV multiple patterning, but clearly order flow will be highly… pic.twitter.com/ZoRvJJHC2n
— Tech Fund (@techfund1) June 16, 2025
High-NA EUV was once regarded as the key equipment for the new generation of process applications. In 2024, Intel won the NTIE and other major manufacturers. According to reports from TheElec, Intel has obtained the production capacity of ASML's five High-NA EUVs and is expected to be applied to its 18A and 14A, and two units are slowly investing this year. As ASML's annual High-NA EUV production capacity is about five to six units, it shows Intel's almost erosion in its early production, which illustrates Intel's ambition to strengthen its return to its semiconductor leading position.
However, at the "Intel Foundry Direct 2025" conference, it was explained that the application process based on the traditional Low-NA EUV (low-numeric pore) was not fully promised to reduce risks. A report pointed out that ASML has delivered a total of 5 high-quality NA equipment to three customers, including Intel, Taiwan Power and South Korea's Samsung, but it will not be delivered in the second half of 2025.
In addition to Intel, Telco already has a High-NA EUV and gives a price discount. However, this year, Zhang Xiaoqiang, deputy general manager and deputy co-operating manager of Taiwan Electric Power, admitted that this session "may not necessarily" use ASML's latest generation High-NA EUV exposure machine. In addition to pointing out that High-NA EUV is too expensive and expensive, it is not necessary to use this equipment to maintain similar complexity.
While Korean media reports the project of Samsung Electronics and SK Hynix, DRAM will be directed to 3D DRAM, and 3D DRAM does not require High-NA or Low-NA EUV equipment. Unlike traditional DRAM, 3D DRAM improves transistor density through "vertical stacking", so it is enough to use ArF microfilm technology without relying on EUV equipment.
According to Reuters' report, the latest High NA is about $378 million, compared with ASML's existing EUV equipment priced at about $200 million. High NA microfilm tools are expected to reduce chip design to one-third, increasing density and performance, but operators also need to carefully evaluate whether its high cost is worth it.
As the technology and capital costs required for chip size rise sharply, is the introduction of High-NA still economically beneficial? As the process gradually falls into the limit, future breakthroughs in semiconductor technology may turn to a more economically efficient innovative path.
ASML’s High NA EUV Machines Won’t Be As Important In Future Chip Manufacturing Says Intel Director – Report TSMC says can make next generation chips without ASML’s new machine Extended reading: Taiwan Electric High-level: A14 does not have to use ASML new machine that costs double To reduce costs, the production of High-NA EUV for the A14 process